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> Connor winfield SGC200 19.44MHZ synchronous clock gen
Connor winfield SGC200 19.44MHZ synchronous clock gen
Connor Winfield SGC200 19.44MHz Synchronous Clock Gen
The SCG200 Series provides high precision phase lock loop frequency translation for the telecommunication applications. The SCG200 products generate a CMOS output from an intrinsically low jitter, voltage controlled crystal oscillator. Most models provide a jitter attenuated, internal reference that is connected to a Reference Output pin.
SCG200 Series is well suited for use in line cards, service termination cards and similar functions to provide reliable reference, phase locked, synchronization for TDM, PDH, SONET and SDH network equipment. The SCG200 Series provides a jitter filtered, wander following output signal sychronized to a superior Stratum or peer input reference signal.
The SCG200 Series include the following features: Free Run, Tri-state and alarm outputs for Loss-of-Reference, (LOR), Loss-of-Lock, (LOL) During the LOR alarm, the SCG200 will also enter a Free Run state which will guarantee a 20 ppm accurate output. Additionally the Free Run mode may be entered manually by asserting a high signal to the Free Run Enable pin. The outputs may be put into the tri-state high impedance condition for external testing purposes by asserting a high signal to the Tri-State Enable pin.
The SCG200 Series are 3.3 Volt components that typically draw less than 100 mA. All models have a fast acquisition time of approximately 0.3 seconds and can be used in applications that require temperature rating of 0 - 70 C. The SCG200 package dimensions are .775" x .82" x .35" on a six layer FR4 board with surface mount pins. Parts are assembled using high temperature solder to withstand surface mount reflow process.
